Marvell at Aliso Viejo is looking for a good ASIC designer. The following are the
job description and requirements. If you believe that you are qualified or have
the potential, please feel free to send your resume to feng.shi@gmail.com.
Job description
An ASIC designer position at a fast-paced mixed RF/analog/digital
design environment. Design of digital signal processing (DSP) data
paths and control systems for advanced mixed-signal integrated
circuits from RTL to physical levels. Verification and debugging for
digital modules through simulation, and development of functional test
cases. Logic synthesis, timing analysis, and logic formal equivalency
checking. Work closely with front end system engineers and backend PNR
engineers. Write scripts to achieve higher performance and
productivity through automation. Mixed signal simulation and modeling
of analog circuits.
Requirement
1) Master or PhD degree in electrical engineering with 0-2 year related
work experience. New graduates are welcome.
2) Knowledge and experience with ASIC design, wireless
telecommunications, and digital signal processing algorithms.
3) Proficient with RTL digital circuit design using Verilog, extensive
experience with defining test cases, running simulation, verifying,
and debugging for digital circuits.
4) Proficient with logic synthesis, formal verification, and static
timing analysis.
5) Knowledge in low power digital circuit design, design for
testability, and mixed signal simulation. Knowledge in PNR is a plus.
6) Proficient with Tcl and PERL scripting, C/C++/Matlab programming a plus.
7) Must be a team player.